vmx – x86 virtualization interface
No virtual CPU.
The virtual CPU is being initialized.
The virtual CPU is idle.
The virtual CPU is executing code.
The virtual CPU suffered a fatal error. This state may be followed by an error message.
The virtual CPU is shutting down.
access cache lowaddr highaddr segment offset
Lowaddr specifies the lowest address in the region and highaddr one past the highest address.
The region is mapped to a region of the same size in the global segment segment (see
Writes to the
Some registers (CR0 and CR4) are split into three registers, suffixed real, fake and mask. In this case, real corresponds to the bits that affect actual CPU execution, fake corresponds to the bits read back by the guest and the bits set in mask are those "owned" by the host. The guest is free to modify the bits that it owns (in which case it always has the same value in both real and fake), but attempting to change a host-owned bit from the status in fake causes a VM exit. Certain bits are owned by the kernel, which means they are fixed in both mask and real.
Some notable exit causes are (see kernel source code for a complete list)
Exception of the specified type (e.g. #gp for general protection fault). Currently only debug exceptions are configured to cause VM exits.
The virtual CPU attempted a memory access that does not match any entry in the map file.
Illegal access to a control register (see above).
The virtual CPU attempted to execute the instruction instr.
Not an actual exit, but acknowledgement that an interrupt request (IRQ) was posted.
Create a new virtual CPU.
Destroy the current virtual CPU.
Launch the virtual CPU. Regs is an optional list of register changes in the format name=value; that will be applied before launching.
Stop the virtual CPU.
Executes a single instruction with the virtual CPU.
If the -map option is specified, a 4 KB page at address addr will be temporarily (for the duration of the step) mapped to the spceified segment and offset.
A step can fail, in which case a VM exit message is sent to
The exception excep is triggered in the virtual CPU. Excep can either be a named exception (such as #gp, in lower case) or an exception number. A number may be preeded by # to mark it as an exception, otherwise it is delivered as an interrupt (but always disregarding whether interrupts are enabled).
An Interrupt is posted, i.e. the exception excep will be triggered the next time interrupts are enabled in the virtual CPU, at which point a
unhandled troff command .IExcep
Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B, Chapters 23-33.
Currently only one virtual CPU is supported and it is tied to the bootstrap processor.
The interface will almost certainly change in the future.